View HCS02HMSR_551708.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HCS02MS
August 1995
Radiation Hardened Quad 2-Input NOR Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14 TOP VIEW
Y1 1 A1 2 B1 3 Y2 4 14 VCC 13 Y4 12 B4 11 A4 10 Y3 9 B3 8 A3
Features
* 3 Micron Radiation Hardened SOS CMOS * Total Dose 200K RAD(Si) * SEP Effective LET No Upsets: >100 MEV-cm2/mg * Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) * Dose Rate Survivability: >1 x 1012 Rads (Si)/s * Dose Rate Upset >1010 RAD(Si)/s 20ns Pulse * Latch-Up Free Under Any Conditions * Military Temperature Range: -55oC to +125oC * Significant Power Reduction Compared to LSTTL ICs * DC Operating Voltage Range: 4.5V to 5.5V * Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min * Input Current Levels Ii 5A at VOL, VOH
A2 5 B2 6 GND 7
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP3-F14 TOP VIEW
Y1 A1 B1 Y2 A2 B2 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC Y4 B4 A4 Y3 B3 A3
Description
The Intersil HCS02MS is a Radiation Hardened Quad 2-Input NOR Gate. A low on both inputs forces the output to a High state. The HCS02MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS02MS is supplied in a 14 lead Ceramic Flatpack Package (K suffix) or a 14 lead SBDIP Package (D suffix).
TRUTH TABLE INPUTS OUTPUTS Bn L H L H Yn H L L L
Ordering Information
PART NUMBER HCS02DMSR TEMPERATURE RANGE -55oC to +125oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample PACKAGE 14 Lead SBDIP
An L L H H 14 Lead Ceramic Flatpack 14 Lead SBDIP
An (2, 5, 8, 11)
HCS02KMSR
-55oC to +125oC
NOTE: L = Logic Level Low, H = Logic level High
HCS02D/ Sample HCS02K/ Sample HCS02HMSR
+25oC
Functional Diagram
+25oC
Sample
14 Lead Ceramic Flatpack Die
Bn
Yn (1, 4, 10, 13)
+25oC
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
Spec Number File Number
1
518744 2433.2
DB NA
(3, 6, 9, 12)
Specifications HCS02MS
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance JA JC SBDIP Package. . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W Maximum Package Power Dissipation at +125oC SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.66W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/oC
CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . 100ns/V Max Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Low Voltage (VIL). . . . . . . . . . . . . . .0.0V to 30% of VCC Max. Input High Voltage (VIH) . . . . . . . . . . . . . . 70% of VCC to VCC Min.
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V 1 2, 3 Output Current (Source) IOH VCC = 4.5V, VIH = 4.5V, VOUT = VCC -0.4V, VIL = 0V VCC = 4.5V, VIH = 3.15V, IOL = 50A, VIL = 1.35V VCC = 5.5V, VIH = 3.85V, IOL = 50A, VIL = 1.65V Output Voltage High VOH VCC = 4.5V, VIH = 3.15V, IOH = -50A, VIL = 1.35V VCC = 5.5V, VIH = 3.85V, IOH = -50A, VIL = 1.65V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND 1 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC MIN 4.8 4.0 -4.8 -4.0 MAX 10 200 0.1 UNITS A A mA mA mA mA V
PARAMETERS Quiescent Current
SYMBOL ICC
(NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
1, 2, 3
+25oC, +125oC, -55oC
VCC -0.1 VCC -0.1 -
-
V
1, 2, 3
+25oC, +125oC, -55oC
-
V
1 2, 3
+25oC +125oC, -55oC +25oC, +125oC, -55oC
0.5 5.0 -
A A -
Noise Immunity Functional Test
FN
VCC = 4.5V, VIH = 0.70(VCC), VIL = 0.30(VCC) (Note 2)
7, 8A, 8B
NOTES: 1. All voltages reference to device GND. 2. For functional tests, VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
Spec Number 2
518744
Specifications HCS02MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 Input to Yn TPLH VCC = 4.5V 9 10, 11 NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC. LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 2 2 2 2 MAX 18 20 20 22 UNITS ns ns ns ns
PARAMETER Input to Yn
SYMBOL TPHL
(NOTES 1, 2) CONDITIONS VCC = 4.5V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Capacitance Power Dissipation Input Capacitance SYMBOL CPD CONDITIONS VCC = 5.0V, f = 1MHz NOTES 1 1 CIN VCC = 5.0V, f = 1MHz 1 1 Output Transition Time NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. TTHL TTLH VCC = 4.5V 1 1 TEMPERATURE +25oC +125oC, -55oC +25oC +125oC +25oC +125oC MIN MAX 18 26 10 10 15 22 UNITS pF pF pF pF ns ns
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (NOTES 1, 2) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V VCC = 4.5V, VIN = VCC or GND, VOUT = VCC -0.4V VCC = 4.5V or 5.5V, VIH = 0.70(VCC), VIL = 0.30(VCC) at 200K RAD, IOL = 50A VCC = 4.5V or 5.5V, VIH = 0.70(VCC), VIL = 0.30(VCC) at 200K RAD, IOH = -50A VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIH = 0.70(VCC), VIL = 0.30(VCC) at 200K RAD, (Note 3) VCC = 4.5V VCC = 4.5V 200K RAD LIMITS TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC MIN 4.0 -4.0 VCC -0.1 2 2 MAX 0.2 0.1 5 20 22 UNITS mA mA mA V V A ns ns
PARAMETERS Quiescent Current Output Current (Sink) Output Current (Source) Output Voltage Low Output Voltage High Input Leakage Current Noise Immunity Functional Test Input to Yn
SYMBOL ICC IOL IOH VOL VOH IIN FN TPHL TPLH
NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC. 3. For functional tests, VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
Spec Number 3
518744
Specifications HCS02MS
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) GROUP B SUBGROUP 5 5
PARAMETER ICC IOL/IOH
DELTA LIMIT 3A -15% of 0 Hour
TABLE 6. APPLICABLE SUBGROUPS GROUP A SUBGROUPS COMFORMANCE GROUP Initial Test Interim Test PDA Final Test Group A (Note 1) Subgroup B5 Subgroup B6 Group D NOTES: 1. Alternate Group A testing in accordance with MIL-STD-883 Method 5005 may be exercised. 2. Table 5 parameters only. MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 TESTED 1, 7, 9 1, 7, 9, 1, 7, 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, 1, 7, 9 1, 7, 9 1, 2, 3, (Note 2) RECORDED 1 (Note 2) 1, (Note 2)
TABLE 7. TOTAL DOSE IRRADIATION TEST CONFORMANCE GROUPS Group E Subgroup 2 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. METHOD 5005 PRE RAD 1, 7, 9 POST RAD Table 4 READ AND RECORD PRE RAD 1, 9 POST RAD Table 4 (Note 1)
Spec Number 4
518744
Specifications HCS02MS
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OSCILLATOR OPEN GROUND 1/2 VCC = 3V 0.5V VCC = 6V 0.5V 50kHz 25kHz
STATIC BURN-IN I TEST CONDITIONS (Note 1) 1, 4, 10, 13 2, 3, 5, 6, 7, 8, 9, 11, 12 14 -
STATIC BURN-IN II TEST CONNECTIONS (Note 1) 1, 4, 10, 13 7 2, 3, 5, 6, 8, 9, 11, 12, 14 -
DYNAMIC BURN-IN I TEST CONNECTIONS (Note 2) 7 1, 4, 10, 13 14 2, 3, 5, 6, 8, 9, 11, 12 -
NOTES: 1. Each pin except VCC and GND will have a resistor of 10K 5% static burn-in. 2. Each Pin except VCC and GND will have a resistor of 1k 5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS OPEN 1, 4, 10, 13 GROUND 7 VCC = 5V 0.5V 2, 3, 5, 6, 8, 9, 11, 12, 14
NOTE: Each pin except VCC and GND will have a resistor of 47K 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 5
518744
HCS02MS Intersil Space Level Product Flow - `MS'
Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015
NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative.
100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 3 (T3) 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic, Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5)
Spec Number 6
518744
HCS02MS AC Timing Diagrams
VIH VS VIL TPLH TPHL VOH VS VOL TTLH 80% VOL 20% 80% 20% TTHL OUTPUT CL = 50pF RL = 500 INPUT CL RL
AC Load Circuit
DUT TEST POINT
FIGURE 2
VOH
OUTPUT
FIGURE 1 AC VOLTAGE LEVELS PARAMETER VCC VIH VS VIL GND HCS 4.50 4.50 2.25 0 0 UNITS V V V V V
Spec Number 7
518744
HCS02MS Die Characteristics
DIE DIMENSIONS: 87 x 88 mils 2.20mm x 2.24mm METALLIZATION: Type: AlSi Metal Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 13kA 2.6kA WORST CASE CURRENT DENSITY: <2.0 x 105A/cm2 BOND PAD SIZE: 100m x 100m 4 x 4 mils
Metallization Mask Layout
HCS02MS
Y1 (1) VCC (14) Y4 (13)
A1 (2)
(12) B4
B1 (3)
(11) A4
Y2 (4)
(10) Y3
A2 (5) (9) B3
(6) B2
(7) GND
(8) A3
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 8
518744

▲Up To Search▲

Price & Availability of HCS02HMSR

	To Download HCS02HMSR Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .